Chip Tariff Row

Washington readies Phase Two semiconductor duties as Seoul and Taipei bargain for relief and markets brace for higher electronics prices

WASHINGTON, September 8, 2026. The Trump administration’s plan for a second, far broader round of semiconductor tariffs hardened into the dominant story in global trade over the past several days, as negotiators from South Korea and Taiwan pressed Washington for assurances, Asian chip stocks swung on every new signal, and American technology buyers began recalculating what servers, laptops and gaming hardware will cost once the new duties land.

The catalyst was Commerce Secretary Howard Lutnick’s on-the-record confirmation, delivered in television interviews at the G20 Innovation Ministerial in Chapel Hill, North Carolina, that a Phase Two expansion of the Section 232 semiconductor tariff program is no longer under internal debate but is coming. His formula, repeated across appearances on CNBC and Bloomberg TV, was blunt: companies that build chips in the United States will pay nothing, while companies that do not should, in his words, “expect to pay to enter the greatest market in the world.”

In the days since, the story has developed on three fronts at once. Seoul’s trade ministry has been in near-continuous contact with the Commerce Department over how Korean chipmakers will be treated relative to Taiwanese rivals, invoking a “no less favorable” treatment pledge secured in the US-Korea trade framework, according to Korean officials quoted by the Seoul Economic Daily. Taiwanese officials, whose flagship manufacturer TSMC already holds a negotiated quota arrangement, have sought clarity on whether Phase Two will alter those terms. And equity markets delivered their own verdict on Monday, with Tokyo’s Nikkei 225 climbing roughly 2 percent on AI chip optimism even as the broader market showed far more declining stocks than gainers, a divergence analysts attributed to investors crowding into the handful of names seen as insulated from tariff exposure.

From a Narrow First Strike to a Broad Second Wave

The first phase of the semiconductor tariff program arrived in January 2026, when President Trump signed Proclamation 11002 imposing a 25 percent ad valorem duty on a narrow set of advanced computing chips. The White House fact sheet accompanying that proclamation named Nvidia’s H200 accelerator and AMD’s MI325X as examples of covered products, and the document itself labeled the action “Phase 1,” an unusually explicit signal that more was planned.

Just as important as what Phase One taxed was what it spared. The proclamation carved out six exemption categories, covering chips destined for US data centers, research and development, AI startups, repair operations, consumer and industrial applications outside data centers, and public sector uses. Those carve-outs were a deliberate structural choice, allowing the enormous American AI infrastructure buildout to continue without tariff drag while the administration negotiated bilateral arrangements with Taiwan, South Korea and Japan.

Phase Two, as Lutnick has now described it, collapses that distinction. The scope under consideration extends beyond bare chips to finished products that contain them, including servers, laptops and gaming consoles, categories that were sheltered under the Phase One exemptions. Reporting by Tom’s Hardware, citing eight sources familiar with the deliberations, indicates the administration has also considered setting separate tariff rates and quotas for individual countries, with country-specific guidance covering their major semiconductor manufacturers. Earlier reporting by Politico, published in late August and based on eight sources of its own, first surfaced the internal deliberations that Lutnick has since confirmed as policy direction.

Three critical details remain unpublished: the tariff rates themselves, the exemption categories that will survive from Phase One, if any, and the timeline between announcement and implementation. A Commerce Department report on the data center semiconductor market, mandated by Proclamation 11002 with a July 1 delivery deadline, was completed but has not been released publicly, and no explanation for the delay has been offered.

The Pharmaceutical Template

Lutnick has been explicit about the model the administration intends to follow. Asked about the design of Phase Two, he pointed to the pharmaceutical tariff program, under which drugmakers that committed to building manufacturing in the United States and accepted most favored nation pricing received tariff relief. “We gave tariff relief to companies who built their innovative pharmaceuticals in America and did MFN. So that’s what you should look for in semiconductors,” he said in remarks reported by Tech Times.

In practice, that means tariff-free import allowances scaled to a company’s investment in US manufacturing capacity. The clearest existing example is TSMC, which has committed 265 billion dollars to its Arizona fabrication complex, the largest foreign direct investment in American history. Under the arrangement negotiated alongside Proclamation 11002, TSMC can import chips duty free at a ratio of 2.5 times its US manufacturing capacity while new plants are under construction, tightening to 1.5 times once facilities become operational.

The arithmetic of that formula is where the friction begins. TSMC’s own projections place only about 30 percent of its most advanced fabrication capacity in Arizona at full buildout. At the 1.5 times operational ratio, that would generate duty-free coverage for roughly 45 percent of the company’s current production, leaving the majority of the advanced chips American AI operators need exposed to tariff liability. For companies with no US manufacturing at all, and no realistic capital path to building any, the formula offers nothing. AI startups, university research laboratories, mid-tier cloud providers and federal research programs would face full tariff exposure on every imported chip.

Seoul’s Parity Problem

For South Korea, the stakes of Phase Two are compounded by a treaty question. Under its trade framework with Washington, Korea secured language committing the United States to treat Korean semiconductors no less favorably than those of competing countries, a provision aimed squarely at the Taiwan quota deal. Korean officials confirmed in early September that chip tariff talks with Washington are proceeding on the basis of that pledge, according to the Seoul Economic Daily.

Parity on paper, however, is not parity in practice. Analysis circulating among Korea trade watchers, including a detailed assessment published on the Korea trade newsletter koreattw, suggests that for Samsung and SK Hynix to match TSMC’s US commitment on a proportional basis, the two companies would need to invest roughly 6.5 times what they have committed to date. Korea’s Industry Minister Kim Jung-kwan completed a two-day Washington visit in August, meeting with Lutnick and US Trade Representative Jamieson Greer, and told reporters afterward there had been “significant and meaningful progress,” though no agreement text has been published.

Korean investment on the ground is accelerating regardless. SK Hynix broke ground on August 27 on an advanced packaging facility of more than 4 billion dollars at Purdue Research Park in West Lafayette, Indiana, attended by Governor Mike Braun and Senator Todd Young. But the project timeline illustrates the gap between tariff pressure and manufacturing reality: the cleanroom is projected to open in October 2028, with mass production of next-generation HBM4E memory targeted for the second half of 2029. Until then, the Indiana operation will depend on wafers produced in Korea, tariffs or no tariffs.

Why Section 232 Changes the Stakes

The legal architecture of Phase Two matters as much as its scope. After the Supreme Court’s February ruling in Learning Resources v. Trump, which held 6 to 3 that the International Emergency Economic Powers Act does not authorize tariffs, Section 232 of the Trade Expansion Act of 1962 became the administration’s primary surviving vehicle for broad tariff action.

The distinction is not academic. An IEEPA tariff could be switched off by executive order the day a president changed course. A Section 232 tariff, grounded in a national security finding, remains in force until a president affirmatively declares that the covered imports no longer threaten national security, and Congress cannot remove it without a veto-proof majority. Once Phase Two is finalized and published, duties on servers, laptops and gaming hardware would carry no sunset date and would survive a change of administration absent deliberate action to unwind them. Trade counsel advising importers have been blunt on this point: cost models built on an assumption of temporary disruption are built on sand.

The Economic Ledger

The economic analyses published to date suggest the stakes for the American technology sector are unusually large. The Center for Strategic and International Studies estimated in May that approximately 54 cents of every dollar spent on US data center infrastructure goes to semiconductors, and that the projected 2.7 trillion dollars in US data center capital expenditure through 2030 will require more than 1.4 trillion dollars in chips, the overwhelming majority imported.

The Computer and Communications Industry Association has estimated that taxing both chips and the finished products containing them could cost the United States roughly 90 billion dollars in GDP annually, with about 20 percent of planned data center construction through 2030, some 450 billion dollars in capital expenditure, delayed, canceled or moved abroad, putting approximately 243,000 jobs at risk. The Information Technology and Innovation Foundation warned in June that blanket semiconductor tariffs would, in its words, “ultimately weaken US growth, raise prices for consumers, and undermine American AI leadership.”

Consumers are already feeling the price pressure that Phase Two would compound. DRAM contract prices rose 90 to 95 percent quarter on quarter in the first quarter of 2026, the steepest quarterly increase in the memory industry’s recorded history, driven by AI demand. Gartner projected in February that surging memory and storage costs would push PC prices up 17 percent and smartphone prices up 13 percent this year compared with 2025, and one of its analysts, Ranjit Atwal, expects the sub-500 dollar PC tier to disappear by 2028 regardless of tariff policy. The console market tells the same story in retail prices: Nintendo raised the Switch 2 to 499.99 dollars effective September 1, the Xbox Series X reached 799.99 dollars on August 1, and the PlayStation 5 sells for 549.99 dollars.

The Equipment Question Nobody Is Talking About

One vulnerability in the Phase Two framework has drawn little public attention: the treatment of semiconductor manufacturing equipment, and specifically the extreme ultraviolet lithography machines made by the Dutch firm ASML, the only company in the world that produces them. Every leading-edge chip made by TSMC, Samsung, Intel, SK Hynix and Micron below roughly the 7 nanometer node passes through ASML’s EUV scanners, and the company’s output of approximately 50 to 60 machines per year is the physical ceiling on how quickly the world, including the United States, can add advanced fabrication capacity.

Under the July 2025 EU-US trade agreement, semiconductor manufacturing equipment was carved out under a zero-for-zero tariff arrangement, exempting ASML’s tools from the 15 percent baseline applied to most European goods. A Phase Two action under Section 232 has the legal authority to override or complicate that carve-out. ASML’s chief financial officer, Roger Dassen, said before the EU deal that a 30 percent tariff on European goods could raise the price of a single high-end EUV machine from roughly 250 million euros to 325 million euros. ASML withdrew its 2026 revenue growth guidance earlier this year, citing tariff uncertainty alongside weaker Chinese demand. The paradox is direct: tariffs designed to force fab construction in America could raise the cost of the one machine no American fab can be built without.

The China Dimension and the Materials Layer

Running alongside the chip escalation is a parallel action aimed one layer down the supply chain. On August 6, President Trump signed a proclamation imposing a 15 percent ad valorem tariff on downstream polysilicon derivatives, including ingots, wafers, solar cells and solar modules, together with minimum import prices on all polysilicon-derived products, effective December 4. The minimum price mechanism sets floors of 21 dollars per kilogram for polysilicon, 100 dollars per kilogram for ingots and wafers, 22 cents per watt for solar cells and 38 cents per watt for solar modules, with importers bringing product in below those levels required to pay the difference as additional duty. The terms were documented publicly in securities disclosures, including a quarterly filing by the power company AES describing the proclamation.

China is the dominant global producer of polysilicon, and the measure functions as a direct pressure point on Chinese supply chains for both semiconductors and solar equipment. Read together with Phase Two, the polysilicon action shows the administration extending the same industrial policy logic, tariffs paired with domestic production incentives, from finished chips down into the materials that feed them. For importers, it also previews an enforcement pattern: minimum import prices are administratively unusual in modern US practice, and customs specialists expect valuation disputes to follow once collection begins in December.

Beijing’s response so far has been muted on semiconductors specifically, in part because US export controls already bar Chinese purchases of the most advanced American chips, making tariffs on Chinese chip imports largely symbolic. The more consequential Chinese exposure runs through finished electronics, where China remains a leading assembly hub for laptops, servers and consumer devices that Phase Two could sweep in. Chinese goods already carry Section 301 duties from earlier actions, and the July forced labor tariffs added a further 12.5 percent layer, meaning a Phase Two duty on finished electronics would stack a third instrument on the same containers by the time they reach American ports.

A Deadline in Congress

Running beneath the tariff debate is a tax deadline that shapes the entire onshoring calculus. The Advanced Manufacturing Investment Credit under Section 48D, a 35 percent refundable credit for qualified investment in US semiconductor manufacturing, requires construction to begin by December 31, 2026. Industry group SEMI brought senior tax executives to Capitol Hill in July to press for a multi-year extension, and Senate Finance Committee Chairman Mike Crapo of Idaho and Ranking Member Ron Wyden of Oregon issued a bipartisan statement on August 5 supporting an extension. As of this week, no legislation has passed.

The result is a squeeze from both directions. Phase Two raises the cost of importing; the potential expiry of the 48D credit raises the cost of the domestic alternative. Building a leading-edge fab in the United States already costs 30 to 50 percent more than in Taiwan, South Korea or Singapore, a gap attributable largely to competing governments’ incentive programs. South Korea offers research and development incentives of 30 to 50 percent, Taiwan offers credits of up to 35 percent for advanced nodes plus equipment import duty exemptions, and Japan provides a 20 percent corporate income tax reduction along with targeted grants.

What Importers and Buyers Should Do Now

For American importers, distributors and corporate technology buyers, the practical questions are immediate even though the rates are not final. Trade advisers are recommending that companies map their exposure now: identify which products in their import mix contain semiconductors that could fall within an expanded Section 232 scope, model landed costs under a range of plausible rates, and examine whether supply arrangements can be restructured around suppliers holding quota allowances.

Because Section 232 duties apply based on entry date rather than order date, companies with flexibility on shipment timing face a genuine decision about accelerating imports of servers, networking equipment and finished electronics before any Phase Two effective date. That calculation, however, collides with memory prices that are already at record levels, meaning stockpiling today locks in costs that are themselves elevated. For smaller firms without the balance sheet to pre-buy, the more realistic preparation is contractual: reviewing whether existing supply agreements permit tariff cost pass-through, and renegotiating terms where they do not.

Exporters face the mirror image of the problem. American chip designers such as Nvidia, AMD and Qualcomm depend on manufacturing abroad and on open access to foreign markets, and the history of the past two years shows that broad US tariff actions invite retaliation aimed at precisely such champions. Foreign governments negotiating quota arrangements with Washington also hold leverage over the US firms operating in their jurisdictions, from fab permits to procurement decisions, and trade economists caution that a Phase Two rollout perceived as punitive could complicate the bilateral technology partnerships, with Japan, Korea and Taiwan, on which US supply chain security ultimately depends.

The administration, for its part, has signaled it is prepared to accept near-term disruption in exchange for what it views as long-term manufacturing leverage. Nvidia chief executive Jensen Huang, who attended the same G20 gathering where Lutnick made his announcement, told reporters he had held no conversations there about the tariffs, while praising the secretary as supportive of US chipbuilding, a studied distance that captures how carefully the industry is treading. Whether the world’s most advanced chips get made in America faster because of Phase Two, or whether American AI leadership pays the toll in the interim, is the question the next Federal Register notice will begin to answer.